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[Other] Verilog_HDL_huaweirumen

Description: 《Verilog_HDL_华为入门教程》是一本FPGA设计入门的好书- Verilog_HDL_ Huawei Getting Started Guide is an entry-FPGA design books
Platform: | Size: 263168 | Author: 温 | Hits:

[Program doc] DDS

Description: FPGA中实现基于查找表方式（LUT）的DDS实现，可用在数字下变频和COSTAS锁相环中，Verilog编写，本人已经调通-In FPGA-based lookup table approach (LUT) to achieve the DDS can be used in the digital down-conversion and COSTAS PLL, Verilog prepared, I have transferred Qualcomm
Platform: | Size: 148480 | Author: | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 北大微电子学系于敦山老师的课件，介绍Verilog HDL、Cadence Verilog仿真器、可综合的Verilog HDL、设计举例、自动布局布线工具、Verilog的词汇约定等内容-Department of Microelectronics, Peking University in the teacher s courseware mts on Verilog HDL, Cadence Verilog simulator can be integrated Verilog HDL, design, for example, automatic placement and routing tools, Verilog, etc. terms agreed
Platform: | Size: 1550336 | Author: 唐进 | Hits:

[VHDL-FPGA-Verilog] ETHERNET

Description: 具备GMII接口和ARP协议功能的千兆以太网控制器。经过Xilinx SPATAN-III FPGA验证, Verilog描述-With GMII interface and feature ARP protocol Gigabit Ethernet controller. After Xilinx SPATAN-III FPGA verification, Verilog description
Platform: | Size: 69632 | Author: winwalk | Hits:

[VHDL-FPGA-Verilog] Source

Description: PWM的Verilog HDL代码用于FPGA-PWM of the Verilog HDL code for FPGA
Platform: | Size: 2048 | Author: 张猛蛟 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: RS232 verilog design
Platform: | Size: 114688 | Author: liuKe | Hits:

[Graph program] freedev_vga

Description: FPGA的VGA视频输出的Verilog程序-FPGA-VGA video output of the Verilog program
Platform: | Size: 23552 | Author: lx | Hits:

[VHDL-FPGA-Verilog] spi

Description: spi协议的FPGA实现(Verlog).-spi protocol FPGA realize (Verlog).
Platform: | Size: 1024 | Author: 徐凯 | Hits:

[VHDL-FPGA-Verilog] FPGA-SD-COMMUNICATION

Description: 基于QUARTUSII软件 实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信 所用语言位verilog HDL-QUARTUSII software implementation based on FPGA (ATERA CYCLONE II series) with SD Card SD mode digital communication language verilog HDL
Platform: | Size: 5064704 | Author: chenbinjie | Hits:

[VHDL-FPGA-Verilog] S7_UART

Description: 利用FPGA实现串口通信，很好的学习资料 尤其是对 verilog不熟的朋友-FPGA realization of the use of serial communications, a very good learning materials especially in the wake of a friend Verilog
Platform: | Size: 468992 | Author: 杜菲 | Hits:

[VHDL-FPGA-Verilog] T4_sdram_control

Description: verilog语言 利用FPGA控制SDRAM，相信很多朋友都需要 快下载吧-control FPGA Verilog language use SDRAM, believe that many of my friends need to download it faster
Platform: | Size: 19456 | Author: 杜菲 | Hits:

[VHDL-FPGA-Verilog] FPGA-based-DAC

Description: 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulator and a one bit DAC. Since, both of these components can be realized using digital circuits, it is possible to implement a low precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD.
Platform: | Size: 58368 | Author: 开心 | Hits:

[VHDL-FPGA-Verilog] Tun2CNk2

Description: FPGA实现DSP的Verilog 示例-FPGA realization of DSP-Verilog Example
Platform: | Size: 331776 | Author: wanghua | Hits:

[VHDL-FPGA-Verilog] 8255

Description: Verilog语言描述的Intel8255 IP Core，本人已经在某项目中经过了物理验证的，可直接用于FPGA综合或ASIC综合。
Platform: | Size: 6144 | Author: David.Mr.Liu | Hits:

[VHDL-FPGA-Verilog] sine

Description: Verilog编程，利用FPGA实现两路正弦波的信号输出，也可以扩展成六路正弦输出-Verilog programming, the use of FPGA realize two sinusoidal output signals can also be extended into a six-way sinusoidal output
Platform: | Size: 4792320 | Author: 陈剑 | Hits:

[VHDL-FPGA-Verilog] sample8

Description: 运行在FPGA上的Verilog程序，实现对ADC的控制。在控制模块提供的时钟及控制信号下工作，完成模拟信号的量化和编码。
Platform: | Size: 300032 | Author: 叶开 | Hits:

[VHDL-FPGA-Verilog] UART_rec

Description: verilog 串口接收程序，在ACTEL Fusion FPGA上实验成功 和大家一起分享！^_^-Verilog serial receive process, ACTEL Fusion FPGA in the experimental success and share with everyone! ^ _ ^
Platform: | Size: 1024 | Author: whq | Hits:

[Compress-Decompress algrithms] masterspiverilog

Description: spi总线控制器的fpga实现 verilog源代码及测试-spi bus controller realize the FPGA Verilog source code and test
Platform: | Size: 180224 | Author: sang | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 用verilog实现的串口收发数据程序，已经调试通过-Using Verilog to send and receive data to achieve the serial procedures are debugging through
Platform: | Size: 2384896 | Author: 张西贝 | Hits:

[VHDL-FPGA-Verilog] simu_NIOS

Description: 和NIOS功能一样的CPU，可以在FPGA上运行,Verilog源代码-NIOS function and the same CPU, the FPGA can run, Verilog source code
Platform: | Size: 53248 | Author: zx | Hits:
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